110 lines
7.2 KiB
Markdown
110 lines
7.2 KiB
Markdown
x86 has a lot of curious registers. Their purposes and quirks are explored here.
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## General Purpose Registers
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Used in normal operation of kernel space & user space programs.
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| 64-bit | 32-bit | 16-bit | High 8 | Low 8 | Description |
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| ------ | ------ | ------ | ------ | ----- | ------------- |
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| RAX | EAX | AX | AH | AL | Accumulator |
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| RBX | EBX | BX | BH | BL | Base |
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| RCX | ECX | CX | CH | CL | Counter |
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| RDX | EDX | DX | DH | DL | Data |
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| RSI | RSI | SI | | SIL | Source |
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| RDI | EDI | DI | | DIL | Destination |
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| RSP | ESP | SP | | SPL | Stack Pointer |
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| RBP | EBP | BP | | BPL | Stack Base |
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## Pointer Registers
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Used infrequently by the kernel when performing context switches.
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| 64-bit | 32-bit | 16-bit | Description |
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| ------ | ------ | ------ | ------------------- |
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| RIP | EIP | IP | Instruction Pointer |
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## Segment Registers
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Used more often when doing memory segmentation, as opposed to paging.
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| 16-bit | Description |
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| ------ | ------------------------- |
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| CS | Code Segment |
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| DS | Data Segment |
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| ES | Extra Segment |
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| SS | Stack Segment |
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| FS | General Purpose F Segment |
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| GS | General Purpose G Segment |
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## EFLAGS Register
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A set of flags that are set or unset by the ALU to indicate the results of an operation.
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| Bit | Label | Description |
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| ------- | ----- | ------------------------- |
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| 0 | CF | Carry Flag |
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| 2 | PF | Parity Flag |
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| 4 | AF | Auxiliary Flag |
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| 6 | ZF | Zero Flag |
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| 7 | SF | Sign Flag |
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| 8 | TF | Trap Flag |
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| 9 | IF | Interrupt Enable Flag |
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| 10 | DF | Direction Flag |
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| 11 | OF | Overflow Flag |
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| 12..=13 | IOPL | IO Privilege Level |
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| 14 | NT | Nested Task Flag |
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| 16 | RF | Resume Flag |
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| 17 | VM | Virtual 8086 Mode Flag |
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| 18 | AC | Alignment Check |
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| 19 | VIF | Virtual Interrupt Flag |
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| 20 | VIP | Virtual Interrupt Pending |
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| 21 | ID | CPUID Instruction Allowed |
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## Control Registers
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These special registers are set by the CPU and, on occasion, modified to change the behavior of certain instructions or tasks.
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### CR0
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|Bit|Label|Description|
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|---|---|---|
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|0|PE|Protected Mode Enable|
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|1|MP|Monitor co-processor|
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|2|EM|x87 FPU Emulation|
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|3|TS|Task switched|
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|4|ET|Extension type|
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|5|NE|Numeric error|
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|16|WP|Write protect|
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|18|AM|Alignment mask|
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|29|NW|Not-write through|
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|30|CD|Cache disable|
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|31|PG|Paging|
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### CR2
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| Bit | Label | Description |
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| ------ | ----- | ------------------------- |
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| 0..=31 | PFLA | Page Fault Linear Address |
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### CR3
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|Bit|Label|Description|[PAE](https://wiki.osdev.org/PAE "PAE")|[Long Mode](https://wiki.osdev.org/Long_Mode "Long Mode")|
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|3|PWT|Page-level Write-Through|(Not used)|(Not used if bit 17 of CR4 is 1)|
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|4|PCD|Page-level Cache Disable|(Not used)|(Not used if bit 17 of CR4 is 1)|
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|12-31 (63)|PDBR|Page Directory Base Register|Base of PDPT|Base of PML4T/PML5T|
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### CR4
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| Bit | Label | Description |
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| --- | ---------- | --------------------------------------------------------------------------------------------------------------------------------- |
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| 0 | VME | Virtual 8086 Mode Extensions |
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| 1 | PVI | Protected-mode Virtual Interrupts |
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| 2 | TSD | Time Stamp Disable |
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| 3 | DE | Debugging Extensions |
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| 4 | PSE | Page Size Extension |
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| 5 | PAE | Physical Address Extension |
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| 6 | MCE | Machine Check Exception |
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| 7 | PGE | Page Global Enabled |
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| 8 | PCE | Performance-Monitoring Counter enable |
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| 9 | OSFXSR | Operating system support for FXSAVE and FXRSTOR instructions |
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| 10 | OSXMMEXCPT | Operating System Support for Unmasked SIMD Floating-Point Exceptions |
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| 11 | UMIP | User-Mode Instruction Prevention (if set, \#GP on SGDT, SIDT, SLDT, SMSW, and STR instructions when CPL > 0) |
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| 12 | LA57 | 57-bit linear addresses (if set, the processor uses 5-level paging otherwise it uses uses 4-level paging) |
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| 13 | VMXE | Virtual Machine Extensions Enable |
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| 14 | SMXE | Safer Mode Extensions Enable |
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| 16 | FSGSBASE | Enables the instructions RDFSBASE, RDGSBASE, WRFSBASE, and WRGSBASE |
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| 17 | PCIDE | PCID Enable |
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| 18 | OSXSAVE | XSAVE and Processor Extended States Enable |
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| 20 | SMEP | [Supervisor Mode Execution Protection](https://wiki.osdev.org/Supervisor_Memory_Protection "Supervisor Memory Protection") Enable |
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| 21 | SMAP | [Supervisor Mode Access Prevention](https://wiki.osdev.org/Supervisor_Memory_Protection "Supervisor Memory Protection") Enable |
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| 22 | PKE | Protection Key Enable |
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| 23 | CET | Control-flow Enforcement Technology |
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| 24 | PKS | Enable Protection Keys for Supervisor-Mode Pages |
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### CR8
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|Bit|Label|Description|
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|---|---|---|
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|0-3|TPL|Task Priority Level |